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Arm 成立 36 年来首颗自研芯片:AGI CPU 细节披露,1000 亿晶体管、支持 6TB 内存_我的网站

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A |      8 月 25 日消息,科技媒体 Wccftech 昨日(8 月 24 日)发布博文,报道称在 Hot Chips 2026 大会上,Arm 披露了面向智能体人工智能的 AGI CPU 细节,这是该公司成立 36 年以来首颗自研量产芯片。    

One of the Chinese People's Liberation Army (PLA) Navy's first-batch female shipborne flight cadets completes her daytime shipborne landing qualification assessment. Photo: China Military Online
    One of the Chinese People's Liberation Army (PLA) Navy's first-batch female shipborne flight cadets completes her daytime shipborne landing qualification assessment. Photo: China Military OnlineA state media video released on Sunday showed that the Chinese People's Liberation Army (PLA) Navy's first batch of female shipborne pilot trainees have all passed their daytime shipborne landing qualification assessments and have now entered the night landing training and evaluation phase.
The progress of female pilot training is an important indicator of the maturity and systemization of the shipborne aviation talent selection and training system, a military affairs expert said. Smears by some foreign media about China's pilot training capabilities are, in essence, a projection of the West's own anxieties over talent shortages, the expert added.
"Night landings are tougher than I imagined. The entire sea is pitch black. It's hard to tell where the sea ends and the sky begins. It's very easy to become disoriented," said Han Meng, a female trainee pilot at the Naval Aviation University, in the CCTV News video.
"Completing today's landing mission has given me a clearer understanding of my own abilities. I'm about to graduate, and I feel more confident about heading to my post and carrying out various maritime and far-sea missions I'll be assigned," she added.
The CCTV News report showed that the assessment featured a Z-8 helicopter landing on the aft flight deck of a vessel.
CCTV reported on Friday that the first batch of female shipborne pilot trainees had all recently passed their daytime shipborne landing qualification assessments. Shipborne landing is a critical milestone in a shipborne pilot's development, often described as the "certificate" to real naval aviation. Passing this assessment marks a significant step in the PLA Navy's efforts to cultivate female shipborne aviation talent.
All pilot trainees, regardless of gender, must meet the same rigorous physical and psychological standards required for shipborne aviation. The successful qualification of these female trainees demonstrates that the selection and training systems are capable of identifying and developing top-tier talent based on capability, not gender, Zhang Junshe, a Chinese military affairs expert, told the Global Times on Sunday. 
In recent years, the PLA Navy's shipborne aviation talent development has entered a new phase of system-of-systems operations, transitioning from "able to fly and land on ships" to "able to fight and operate jointly," PLA Daily reported on April 22.
Under the synchronized training objectives of developing pilots, combatants and commanders, new pathways for talent cultivation are being explored, including growth opportunities for shipborne fighter and helicopter pilots. Training programs are being optimized across all elements, support resources coordinated across all domains, and implementation advanced across all processes, forming a systematic, integrated talent development framework.
Zhang also mentioned that foreign media outlets have hyped claims of a "pilot shortage" in China or that "talent development cannot keep pace with equipment delivery." Such claims are largely based on selective data comparisons and misunderstandings of China's aviation development, essentially reflecting the West's own anxieties about talent.
First, foreign media outlets often simply compare the total number of licensed pilots in China with that of the US, ignoring differences in population size, the prevalence of aviation culture and historical development. China's nationwide selection process draws from a vast pool of candidates, ensuring high overall pilot quality and building a strong reserve of aviation talent, Zhang noted.
In July, the PLA Navy's 2026 pilot recruitment process was successfully completed. The average college entrance examination scores of admitted pilot trainees reached a record high. In recent years, through extensive outreach and publicity campaigns, enthusiasm among young applicants has continued to grow, with the recruitment pool expanding year by year.
The Navy's recruitment authorities have established carrier-based flight aptitude assessment platforms, introduced new testing technologies including virtual reality and biofeedback, and improved the comprehensiveness and accuracy of flight aptitude evaluations, said the PLA Navy.
Meanwhile, China has established a diversified training system encompassing academy training, airline-commissioned training and civilian supplementary pathways. Through general aviation development, China is expanding its civilian talent reserve and gradually narrowing the gap with leading aviation nations, the expert said.
Moreover, modern air warfare is a complex system undertaking, relying not only on the number of pilots but also on comprehensive system-of-systems support across strategic early warning, electronic warfare, command communications and ground maintenance. The leapfrog development of China's aviation equipment is built on overall improvements in comprehensive national strength and the aviation industrial system, rather than a simple linear increase in pilot numbers, Zhang added.

B | 该处理器基于第 3 代 Neoverse V3 核心,基于 Armv9.2 架构,单颗芯片最多配置 136 个核心,每个核心配备 2 MB 专属 L2 缓存,最高频率为 3.7 GHz。

C | 该芯片采用台积电 3nm 工艺(N3P)和双芯粒(Dual Chiplets)设计,每个芯粒搭载超过 500 亿个晶体管,完整芯片拥有 1,000 亿个晶体管,整颗芯片的最大 TDP 为 300 W。处理器将内存与 I/O 集成在同一芯片上,面向低延迟内存访问,内存延迟低于 100 ns。I/O 方面,该处理器提供 96 条 PCIe Gen6 通道,支持 CXL 3.0 内存及扩展设备,并配备 AMBA CHI 扩展链路。它支持 DDR5-8800 内存,每个核心获得 6 GB/s 内存带宽,单颗芯片容量达到 6 TB。

D | Neoverse V3 核心包含分支预测单元和指令预取器。

E | 指令取指部分配备 64 KB 指令缓存,前端解码队列为 10 路,解码单元采用 10 路设计;重命名与分发单元拥有超过 384 条目的乱序执行窗口,支持 10 路分发和 8 路提交。高级 SIMD 流水线采用双 128 bit 低延迟数据通路。L2 缓存的加载到使用延迟为 10 个周期,传输能力为 128 B / 周期;每个核心配备 2 MB 私有 L2 缓存。

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